Description: Logic Synthesis for Finite State Machines Based on Linear Chains of States : Foundations, Recent Developments and Challenges, Hardcover by Barkalov, Alexander; Titarenko, Larysa; Bieganowski, Jacek, ISBN 3319598368, ISBN-13 9783319598369, Brand New, Free shipping in the US
This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations). This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation.
This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of systems that included complex control units
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Number of Pages: VIII, 225 Pages
Publication Name: Logic Synthesis for Finite State Machines Based on Linear Chains of States : Foundations, Recent Developments and Challenges
Language: English
Publisher: Springer International Publishing A&G
Subject: Electronics / Circuits / Logic, Automation, Engineering (General), Intelligence (Ai) & Semantics, Electronics / Circuits / General
Publication Year: 2017
Item Weight: 169.1 Oz
Type: Textbook
Subject Area: Computers, Technology & Engineering
Author: Alexander Barkalov, Larysa Titarenko, Jacek Bieganowski
Item Length: 9.3 in
Series: Studies in Systems, Decision and Control Ser.
Item Width: 6.1 in
Format: Hardcover